It's about time
The Image Sensor Front End (SFE)
This 4 layer PCB will act as the bridge between our image sensor: the CMV12000 (providing a native resolution of 4096x3072 pixels - more details are available on the Axiom Minisite) and our prototyping platform - the Zedboard. Inside the FPGA, all image data taken from the sensor will be read into memory, preprocessed and then output as a video stream over HDMI.
With all of this said and done, we must now wait up to 4 weeks for the boards to arrive (since they are grouped into batches and we don't know exactly when one batch will fill to maximum capacity and be sent off to the factory). Once our boards arrive, we will immediately get to work populating and testing the board. Whilst you would normally plan for a second and third hardware revision to get everything into an optimised working state, we don't think there will be too many problems with our initial design. After this, we will proceed to work on the FPGA code, dealing with things like image pre-processing, data and memory management.
Things learned along the way
In accordance with our mission statement we have promised to share the knowledge gained throughout our development trajectory. This has now lead to our first side-product: A debug PMOD interface for FPGA development featuring 64 LEDS that can easily be interfaced from inside the FPGA (and which we are using to display "state information"). With the FPGA executing all instructions concurrently, you cannot inspect actions in a step-by-step manner and debug FPGA operations like normal code with breakpoints. As such, this LED matrix is a convenient way to visualise all the processes performed inside the FPGA with your code. We are still thinking about offering these modules fully assembled in our webshop. Let us know if you would be interested in something like this so that we may allocate our limited resources to making it happen.